Issued Patents 2024
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12125848 | Semiconductor device structure incorporating air gap | Chih-Ching Wang, Chun Chung Su, Chung-Wei Wu, Jon-Hsu Ho, Kuan-Lun Cheng +2 more | 2024-10-22 |
| 12118707 | System and method for semiconductor topography simulations | Nuo Xu, Zhengping Jiang, Ji-Ting Li, Yuan-Hao Chang, Zhiqiang Wu | 2024-10-15 |
| 12078551 | Complementary bipolar junction transistor | Zi-Ang Su, Ming-Shuan Li, Shu-Hua Wu, Chih Chieh Yeh, Chih-Hung Wang | 2024-09-03 |
| 12068372 | Semiconductor device structure integrating air gaps and methods of forming the same | Chih-Ching Wang, Kuan-Lun Cheng | 2024-08-20 |
| 12040381 | Method of manufacturing semiconductor devices and semiconductor devices | Cheng-Yi Peng, Wen-Yuan Chen, Yi-Ju Hsu, Jon-Hsu Ho, Song-Bor Lee +1 more | 2024-07-16 |
| 11949001 | Multi-gate devices and fabricating the same with etch rate modulation | Chih-Ching Wang, Chung-I Yang, Jon-Hsu Ho, Kuan-Lun Cheng, Chung-Wei Wu +1 more | 2024-04-02 |
| 11916110 | Semiconductor device having nanosheet transistor and methods of fabrication thereof | Chih-Ching Wang, Wei-Yang Lee, Ming-Chang Wen, Jo-Tzu HUNG, Kuan-Lun Cheng | 2024-02-27 |
| 11907636 | Integrated circuit layout generation method | Ke-Ying Su, Jon-Hsu Ho, Ke-Wei Su, Liang Chen, Wen-Koi Lai +4 more | 2024-02-20 |
| 11908919 | Multi-gate devices with multi-layer inner spacers and fabrication methods thereof | Chih-Ching Wang, Jon-Hsu Ho, Kuan-Lun Cheng, Chung-Wei Wu, Zhiqiang Wu | 2024-02-20 |