Issued Patents 2024
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12183393 | High-speed multi-port memory supporting collision | Pradeep Raj, Sharad Gupta | 2024-12-31 |
| 12047073 | Power supply circuit with reduced leakage current | Pradeep Raj, Sharad Gupta, Chulmin Jung | 2024-07-23 |
| 12020746 | Memory write assist with reduced switching power | Rejeesh Ammanath Vijayan, Pradeep Raj | 2024-06-25 |
| 12020766 | Memory circuit architecture with multiplexing between memory banks | Pradeep Raj, Sharad Gupta, Hemant Patel, Diwakar SINGH | 2024-06-25 |
| 11972834 | Low power and robust level-shifting pulse latch for dual-power memories | Adithya Bhaskaran, Sharad Gupta | 2024-04-30 |
| 11955169 | High-speed multi-port memory supporting collision | Pradeep Raj, Sharad Gupta | 2024-04-09 |
| 11935606 | Memory with scan chain testing of column redundancy logic and multiplexing | Sharad Gupta, Jung Pill Kim, Chulmin Jung, Jais Abraham | 2024-03-19 |