Issued Patents 2024
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12125526 | Memory with bitcell power boosting | Xiao Chen, Chi-Jui Chen, Anil Chowdary Kota, Dhvani Sheth | 2024-10-22 |
| 12094528 | Memory with double redundancy | Dhvani Sheth, Hochul Lee, Anil Chowdary Kota | 2024-09-17 |
| 12047073 | Power supply circuit with reduced leakage current | Pradeep Raj, Rahul Sahu, Sharad Gupta | 2024-07-23 |
| 12014771 | Method of pseudo-triple-port SRAM datapaths | Changho Jung, Arun Babu Pallerla | 2024-06-18 |
| 11935606 | Memory with scan chain testing of column redundancy logic and multiplexing | Rahul Sahu, Sharad Gupta, Jung Pill Kim, Jais Abraham | 2024-03-19 |
| 11894050 | Memory with a sense amplifier isolation scheme for enhancing memory read bandwidth | Hochul Lee, Anil Chowdary Kota, Dhvani Sheth | 2024-02-06 |