Issued Patents 2024
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12166031 | Substrate-less electrostatic discharge (ESD) integrated circuit structures | Biswajeet Guha, Brian J. Greene, Daniel Schulman, Chung-Hsun Lin, Curtis Tsai +1 more | 2024-12-10 |
| 12068314 | Fabrication of gate-all-around integrated circuit structures having adjacent island structures | Leonard P. GULER, Biswajeet Guha, Martin Weiss, Apratim Dhar, William T. BLANTON +7 more | 2024-08-20 |
| 12014959 | Integrated nanowire and nanoribbon patterning in transistor manufacture | Leonard P. GULER, Biswajeet Guha, Mark Armstrong, Tahir Ghani | 2024-06-18 |
| 11990472 | Fabrication of gate-all-around integrated circuit structures having pre-spacer deposition cut gates | Leonard P. GULER, Michael K. Harper, Biswajeet Guha, Tahir Ghani, Niels Zussblatt +6 more | 2024-05-21 |
| 11929396 | Cavity spacer for nanowire transistors | Biswajeet Guha, Leonard P. GULER, Souvik Chakrabarty, Jun Sung Kang, Bruce Beattie +1 more | 2024-03-12 |
| 11908856 | Gate-all-around integrated circuit structures having devices with source/drain-to-substrate electrical contact | Biswajeet Guha, Chung-Hsun Lin, Kinyip Phoa, Oleg Golonzka, Tahir Ghani +5 more | 2024-02-20 |
| 11901458 | Dielectric isolation layer between a nanowire transistor and a substrate | Bruce Beattie, Leonard P. GULER, Biswajeet Guha, Jun Sung Kang | 2024-02-13 |
| 11894368 | Gate-all-around integrated circuit structures fabricated using alternate etch selective material | Sudipto Naskar, Biswajeet Guha, Bruce Beattie, Tahir Ghani | 2024-02-06 |
| 11869891 | Non-planar integrated circuit structures having mitigated source or drain etch from replacement gate process | Jun Sung Kang, Kai Loon Cheong, Erica J. Thompson, Biswajeet Guha, Dax M. Crum +2 more | 2024-01-09 |
| 11869973 | Nanowire transistor structure and method of shaping | Erica J. Thompson, Aditya Kasukurti, Jun Sung Kang, Kai Loon Cheong, Biswajeet Guha +1 more | 2024-01-09 |