| 12148757 |
Integration of Si-based transistors with non-Si technologies by semiconductor regrowth over an insulator material |
Nidhi Nidhi, Han Wui Then, Marko Radosavljevic, Sansaptak Dasgupta, Paul B. Fischer +2 more |
2024-11-19 |
| 12136628 |
High voltage three-dimensional devices having dielectric liners |
Jeng-Ya David Yeh, Curtis Tsai, Joodong Park, Chia-Hong Jan, Gopinath Bhimarasetti |
2024-11-05 |
| 12108595 |
Integrated fuse in self-aligned gate endcap for FinFET architectures and methods of fabrication |
Sumit Ashtekar, Rahul Ramaswamy, Hector M. Saavedra Garcia |
2024-10-01 |
| 12089411 |
Self-aligned front-end charge trap flash memory cell and capacitor design for integrated high-density scaled devices |
Tanuj Trivedi, Rohan K. Bambery, Daniel B. O'Brien, Christopher Alan Nolph, Rahul Ramaswamy +1 more |
2024-09-10 |
| 12080763 |
Silicide for group III-nitride devices and methods of fabrication |
Sansaptak Dasgupta, Marko Radosavljevic, Han Wui Then, Paul B. Fischer |
2024-09-03 |
| 12040395 |
High voltage extended-drain MOS (EDMOS) nanowire transistors |
Nidhi Nidhi, Rahul Ramaswamy, Hsu-Yu Chang, Ting Chang, Babak Fallahazad +2 more |
2024-07-16 |
| 12027613 |
III-N transistor arrangements for reducing nonlinearity of off-state capacitance |
Nidhi Nidhi, Han Wui Then, Marko Radosavljevic, Sansaptak Dasgupta, Paul B. Fischer +2 more |
2024-07-02 |
| 11996403 |
ESD diode solution for nanoribbon architectures |
Nidhi Nidhi, Rahul Ramaswamy, Hsu-Yu Chang, Ting Chang, Babak Fallahazad +4 more |
2024-05-28 |
| 11967615 |
Dual threshold voltage (VT) channel devices and their methods of fabrication |
Hsu-Yu Chang, Neville L. Dias, Chia-Hong Jan, Roman W. Olac-Vaw, Chen-Guan Lee |
2024-04-23 |
| 11935892 |
Self-aligned gate endcap (SAGE) architecture having gate contacts |
Sairam Subramanian |
2024-03-19 |
| 11881511 |
Superlattice FINFET with tunable drive current capability |
Nidhi Nidhi, Rahul Ramaswamy, Sansaptak Dasgupta, Han Wui Then, Marko Radosavljevic +2 more |
2024-01-23 |
| 11881486 |
High voltage three-dimensional devices having dielectric liners |
Jeng-Ya David Yeh, Curtis Tsai, Joodong Park, Chia-Hong Jan, Gopinath Bhimarasetti |
2024-01-23 |
| 11876121 |
Self-aligned gate endcap (SAGE) architecture having gate or contact plugs |
Sairam Subramanian |
2024-01-16 |
| 11862703 |
Gate-all-around integrated circuit structures having dual nanoribbon channel structures |
Tanuj Trivedi, Rahul Ramaswamy, Jeong Dong Kim, Babak Fallahazad, Hsu-Yu Chang +2 more |
2024-01-02 |