Issued Patents 2024
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12174783 | Systolic array of arbitrary physical and logical depth | Jorge Parra, Wei-Yu Chen, Kaiyu Chen, Varghese George, Junjie Gu +4 more | 2024-12-24 |
| 12164430 | Instruction prefetch mechanism | Vasileios Porpodas, Subramaniam Maiyuran, Wei-Yu Chen | 2024-12-10 |
| 12131402 | Page faulting and selective preemption | Altug Koker, Ingo Wald, David Puffer, Subramaniam Maiyuran, Prasoonkumar Surti +4 more | 2024-10-29 |
| 12067641 | Page faulting and selective preemption | Altug Koker, Ingo Wald, David Puffer, Subramaniam Maiyuran, Prasoonkumar Surti +4 more | 2024-08-20 |
| 12007935 | Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format | Subramaniam Maiyuran, Shubra Marwaha, Ashutosh Garg, Supratim Pal, Jorge Parra +3 more | 2024-06-11 |
| 11954063 | Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format | Subramaniam Maiyuran, Shubra Marwaha, Ashutosh Garg, Supratim Pal, Jorge Parra +3 more | 2024-04-09 |
| 11900502 | Compiler assisted register file write reduction | Chandra Gurram, Gang Chen, Subramaniam Maiyuran, Supratim Pal, Ashutosh Garg +3 more | 2024-02-13 |
| 11886875 | Systems and methods for performing nibble-sized operations on matrix elements | Elmoustapha Ould-Ahmed-Vall, Jonathan Pearce, Dan Baum, Michael Espig, Christopher J. Hughes +4 more | 2024-01-30 |
| 11861761 | Graphics processing unit processing and caching improvements | Subramaniam Maiyuran, Durgaprasad Bilagi, Joydeep Ray, Scott Janus, Sanjeev Jahagirdar +9 more | 2024-01-02 |