KC

Kangguo Cheng

IBM: 51 patents #4 of 5,109Top 1%
AS Adeia Semiconductor Solutions: 5 patents #1 of 30Top 4%
GU Globalfoundries U.S.: 1 patents #81 of 199Top 45%
TE Tessera: 1 patents #4 of 37Top 15%
Samsung: 1 patents #7,344 of 17,120Top 45%
📍 Schenectady, NY: #1 of 104 inventorsTop 1%
🗺 New York: #4 of 12,119 inventorsTop 1%
Overall (2024): #294 of 561,600Top 1%
59
Patents 2024

Issued Patents 2024

Showing 26–50 of 59 patents

Patent #TitleCo-InventorsDate
12002753 Electronic fuse with passive two-terminal phase change material and method of fabrication Kevin W. Brew, Lan Yu, Ruilong Xie 2024-06-04
12002850 Nanosheet-based semiconductor structure with dielectric pillar Julien Frougier, Ruilong Xie, Chanro Park 2024-06-04
12002808 Dual dielectric pillar fork sheet device Ruilong Xie, Julien Frougier, Dimitri Houssameddine 2024-06-04
11996480 Vertical transistor with late source/drain epitaxy Juntao Li, Shogo Mochizuki, Choonghyun Lee 2024-05-28
11978796 Contact and isolation in monolithically stacked VTFET Chen Zhang, Ruilong Xie, Lan Yu 2024-05-07
11978783 Vertical fin field effect transistor devices with reduced top source/drain variability and lower resistance Shogo Mochizuki, Choonghyun Lee, Juntao Li 2024-05-07
RE49954 Fabrication of nano-sheet transistors with different threshold voltages Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek 2024-04-30
11963774 Method probe with high density electrodes, and a formation thereof 2024-04-23
11963469 Phase change memory cell with an airgap to allow for the expansion and restriction of the PCM material Ruilong Xie, Carl Radens, Juntao Li 2024-04-16
11963456 MRAM memory array yield improvement Dimitri Houssameddine, Julien Frougier, Ruilong Xie 2024-04-16
11961544 Spin-orbit torque (SOT) magnetoresistive random-access memory (MRAM) with low resistivity spin hall effect (SHE) write line Julien Frougier, Dimitri Houssameddine, Ruilong Xie 2024-04-16
11955526 Thick gate oxide device option for nanosheet device Ruilong Xie, Julien Frougier, Chanro Park, Veeraraghavan S. Basker 2024-04-09
11942374 Nanosheet field effect transistor with a source drain epitaxy replacement Ruilong Xie, Julien Frougier, Chanro Park 2024-03-26
11937521 Structure and method to fabricate resistive memory with vertical pre-determined filament Chanro Park, Ruilong Xie, Choonghyun Lee 2024-03-19
11937522 Confining filament at pillar center for memory devices Dexin Kong, Takashi Ando, Juntao Li 2024-03-19
11935930 Wrap-around-contact for 2D-channel gate-all-around field-effect-transistors Julien Frougier, Ruilong Xie, Chanro Park, Andrew Gaul 2024-03-19
11923363 Semiconductor structure having bottom isolation and enhanced carrier mobility Julien Frougier, Ruilong Xie, Chanro Park, Juntao Li 2024-03-05
11923438 Field-effect transistor with punchthrough stop region Shogo Mochizuki, Juntao Li, Choonghyun Lee 2024-03-05
11916073 Stacked complementary field effect transistors Ruilong Xie, Julien Frougier, Chanro Park 2024-02-27
11908890 Isolation structure for stacked vertical transistors Juntao Li, Chen Zhang, Zhenxing Bi 2024-02-20
11908937 Vertical transport field-effect transistor with ring-shaped wrap-around contact Xin Miao, Chen Zhang, Wenyu Xu 2024-02-20
11901438 Nanosheet transistor Juntao Li, Heng Wu, Peng Xu 2024-02-13
11894433 Method and structure to improve stacked FET bottom EPI contact Alexander Reznicek, Ruilong Xie, Chen Zhang 2024-02-06
11895934 Phase change memory with heater Chanro Park, Julien Frougier, Ruilong Xie 2024-02-06
11894462 Forming a sacrificial liner for dual channel devices Huiming Bu, Dechao Guo, Sivananda K. Kanakasabapathy, Peng Xu 2024-02-06