Issued Patents 2024
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12183306 | Method and system for controlling and synchronizing the display of content on multiple gaming machines and/or external displays | Anil Kumar Narra, Padma Kumari Bhimavarapu, Jose Mendoza Franco, Jasonlee Kissee Hohman, Jacob Jennings +9 more | 2024-12-31 |
| 12176065 | Channel routing for simultaneous switching outputs | Xuan Chen, Chih-Hua Hsu, Abdussalam Aburwein | 2024-12-24 |
| 12154656 | Error pin training with graphics DDR memory | Aaron Willey, Karthik Gopalakrishnan | 2024-11-26 |
| 12101135 | Noise mitigation in single-ended links | Ramon Mangaser, Karthik Gopalakrishnan, Andy Huei Chu | 2024-09-24 |
| 12093124 | Multi-level signal reception | Aaron Willey, Karthik Gopalakrishnan, Ramon Mangaser | 2024-09-17 |
| 12028190 | Lookup table optimization for high speed transmit feed-forward equalization link | Karthik Gopalakrishnan, Andrew Egli | 2024-07-02 |
| 12019876 | Feed forward training of memory interfaces | Aaron Willey, Karthik Gopalakrishnan | 2024-06-25 |
| 12015412 | Dual phase clock distribution from a single source in a die-to-die interface | Srikanth Reddy Gruddanti, Ramon Mangaser, Prasant Kumar Vallur, Krishna Reddy Mudimela Venkata, David Hugh McIntyre | 2024-06-18 |
| 11960435 | Skew matching in a die-to-die interface | Dean E. Gonzales, Gerald R. Talbot, Ramon Mangaser, Michael J. Tresidder, Prasant Kumar Vallur +3 more | 2024-04-16 |
| 11909404 | Delay-locked loop offset calibration and correction | Andy Huei Chu, Karthik Gopalakrishnan | 2024-02-20 |