Issued Patents 2023
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11844217 | Methods for forming multi-layer vertical nor-type memory string arrays | Scott Brad Herner, Jie Zhou, Eli Harari | 2023-12-12 |
| 11844204 | Process for preparing a channel region of a thin-film transistor in a 3-dimensional thin-film transistor array | Vinod R. Purayath, Jie Zhou, Eli Harari | 2023-12-12 |
| 11839086 | 3-dimensional memory string array of thin-film ferroelectric transistors | Christopher J. Petti, Vinod R. Purayath, George Samachisa, Eli Harari | 2023-12-05 |
| 11751392 | Fabrication method for a 3-dimensional NOR memory array | Eli Harari, Scott Brad Herner | 2023-09-05 |
| 11730000 | 3-dimensional nor string arrays in segmented stacks | Eli Harari | 2023-08-15 |
| 11729980 | 3-dimensional NOR memory array architecture and methods for fabrication thereof | Eli Harari, Scott Brad Herner | 2023-08-15 |
| 11705496 | Charge-trapping layer with optimized number of charge-trapping sites for fast program and erase of a memory cell in a 3-dimensional NOR memory string array | Scott Brad Herner, Eli Harari | 2023-07-18 |
| 11610914 | Vertical thin-film transistor and application as bit-line connector for 3-dimensional memory arrays | Tianhong Yan, Scott Brad Herner, Jie Zhou, Eli Harari | 2023-03-21 |
| 11610909 | Processes for forming 3-dimensional horizontal NOR memory arrays | Eli Harari | 2023-03-21 |
| 11557606 | Epitaxial monocrystalline channel for storage transistors in 3-dimensional memory structures and methods for formation thereof | Chenming Hu, Eli Harari | 2023-01-17 |