GT

George S. Taylor

CS Cadence Design Systems: 1 patents #31 of 185Top 20%
📍 Menlo Park, CA: #337 of 775 inventorsTop 45%
🗺 California: #26,301 of 67,585 inventorsTop 40%
Overall (2023): #439,270 of 537,848Top 85%
1
Patents 2023

Issued Patents 2023

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
11797747 Identifying redundant logic based on clock gate enable condition Matthew Eaton, Zhuo Li, James Youren, Ji-Zheng Xu 2023-10-24