JY

James Youren

CS Cadence Design Systems: 1 patents #31 of 185Top 20%
Overall (2023): #180,398 of 537,848Top 35%
1
Patents 2023

Issued Patents 2023

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
11797747 Identifying redundant logic based on clock gate enable condition Matthew Eaton, George S. Taylor, Zhuo Li, Ji-Zheng Xu 2023-10-24