Issued Patents 2023
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11847051 | Memory sub-system logical block address remapping | Kishore Kumar Muchherla, Vamsi Pavan Rayaprolu, Jiangang Wu, Gil Golov | 2023-12-19 |
| 11841794 | Memory sub-system write sequence track | Vamsi Pavan Rayaprolu, Jiangang Wu, Kishore Kumar Muchherla | 2023-12-12 |
| 11836377 | Data transfer management within a memory device having multiple memory regions with different memory densities | AbdelHakim S. Alhussien, Ayberk Ozturk, Luca Bert | 2023-12-05 |
| 11823748 | Voltage bin calibration based on a temporary voltage shift offset | Kishore Kumar Muchherla, Mustafa N. Kaynak, Xiangang Luo, Shane Nowell, Devin M. Batutis +4 more | 2023-11-21 |
| 11797435 | Zone based reconstruction of logical to physical address translation map | Daniel A. Boals, Byron D. Harris, Amy Lee Wohlschlegel | 2023-10-24 |
| 11797216 | Read calibration based on ranges of program/erase cycles | Vamsi Pavan Rayaprolu, Giuseppina Puzzilli, Jeffrey S. McNeil, Kishore Kumar Muchherla, Ashutosh Malshe +1 more | 2023-10-24 |
| 11783901 | Multi-tier threshold voltage offset bin calibration | Kishore Kumar Muchherla, Shane Nowell, Mustafa N. Kaynak, Jiangang Wu, Devin M. Batutis +1 more | 2023-10-10 |
| 11748013 | Grouping blocks based on power cycle and power on time | Kishore Kumar Muchherla, Mustafa N. Kaynak, Jiangang Wu, Sampath K. Ratnam, Sivagnanam Parthasarathy +1 more | 2023-09-05 |
| 11698864 | Memory access collision management on a shared wordline | AbdelHakim S. Alhussien, Jiangang Wu, Qisong Lin, Jung Sheng Hoei | 2023-07-11 |
| 11688479 | Read window based on program/erase cycles | Vamsi Pavan Rayaprolu, Giuseppina Puzzilli, Jeffrey S. McNeil, Kishore Kumar Muchherla, Ashutosh Malshe +1 more | 2023-06-27 |
| 11676664 | Voltage bin selection for blocks of a memory device after power up of the memory device | Kishore Kumar Muchherla, Sampath K. Ratnam, Shane Nowell, Sivagnanam Parthasarathy, Mustafa N. Kaynak +2 more | 2023-06-13 |
| 11609846 | Managing workload of programming sets of pages to memory device | Kishore Kumar Muchherla, Jiangang Wu, Mustafa N. Kaynak, Devin M. Batutis, Xiangang Luo | 2023-03-21 |
| 11593005 | Managing voltage bin selection for blocks of a memory device | Kishore Kumar Muchherla, Mustafa N. Kaynak, Peter Feeley, Sampath K. Ratnam, Shane Nowell +2 more | 2023-02-28 |
| 11586561 | Data validity tracking in a non-volatile memory | Boon Leong Yeap | 2023-02-21 |
| 11587639 | Voltage calibration scans to reduce memory device overhead | Kishore Kumar Muchherla, Mustafa N. Kaynak, Sivagnanam Parthasarathy, Xiangang Luo, Peter Feeley +4 more | 2023-02-21 |
| 11544008 | Temperature correction in memory sub-systems | Gianni Stephen Alsasua, Ashutosh Malshe, Kishore Kumar Muchherla, Vamsi Pavan Rayaprolu, Sampath K. Ratnam +2 more | 2023-01-03 |