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Computer-aided design tool for wide-input logic initialization |
Ikenna Odinaka, Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya |
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Computer-aided design tool for majority or minority inverter graph synthesis |
Ikenna Odinaka, Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya |
2023-11-14 |
| 11809801 |
Computer-aided design tool for circuit logic initialization |
Ikenna Odinaka, Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya |
2023-11-07 |
| 11757452 |
OR-and-invert logic based on a mix of majority or minority logic gate with non-linear input capacitors and other logic gates |
Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni |
2023-09-12 |
| 11748537 |
Computer-aided design tool for logic synthesis of a mix of CMOS gates and majority and minority logic circuits |
Ikenna Odinaka, Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya |
2023-09-05 |
| 11750197 |
AND-OR-invert logic based on a mix of majority OR minority logic gate with non-linear input capacitors and other logic gates |
Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni |
2023-09-05 |