Issued Patents 2022
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11482524 | Gate spacing in integrated circuit structures | Andy Wei, Sean T. Ma | 2022-10-25 |
| 11450736 | Source/drain regions in integrated circuit structures | Sean T. Ma, Andy Wei | 2022-09-20 |
| 11430866 | Device contact sizing in integrated circuit structures | Andy Wei, Sean T. Ma | 2022-08-30 |
| 11342409 | Isolation regions in integrated circuit structures | Sean T. Ma, Andy Wei | 2022-05-24 |
| 11309210 | Self aligned buried power rail | Nicholas V. LiCausi, Lars Liebmann | 2022-04-19 |
| 11264463 | Multiple fin finFET with low-resistance gate structure | Andy Wei | 2022-03-01 |