Issued Patents 2021
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11081192 | Memory plane structure for ultra-low read latency applications in non-volatile memories | Hiroki Yabe, Koichiro Hayashi, Takuya Ariki, Yuki Fujita, Naoki Ookuma +2 more | 2021-08-03 |
| 10885984 | Area effective erase voltage isolation in NAND memory | Hiroki Yabe, Koichiro Hayashi, Takuya Ariki, Yuki Fujita, Naoki Ookuma +2 more | 2021-01-05 |