| 11209992 |
Detection of alteration of storage keys used to protect memory |
Jonathan D. Bradbury, Bruce C. Giamei, James H. Mulder, Peter J. Relson |
2021-12-28 |
| 11199870 |
Clock comparator sign control |
Eberhard Engler, Dan F. Greiner, Michel H. T. Hack, Joachim von Buttlar |
2021-12-14 |
| 11188326 |
Function virtualization facility for function query of a processor |
Dan F. Greiner, Damian L. Osisek |
2021-11-30 |
| 11086624 |
Function virtualization facility for blocking instruction function of a multi-function instruction of a virtual processor |
Dan F. Greiner, Damian L. Osisek, Lisa C. Heller |
2021-08-10 |
| 11080087 |
Transaction begin/end instructions |
Dan F. Greiner, Christian Jacobi, Marcel Mitran |
2021-08-03 |
| 11080064 |
Instructions controlling access to shared registers of a multi-threaded processor |
Giora Biran, Fadi Y. Busaba, Ophir Erez, Mark S. Farrell, Lisa C. Heller +2 more |
2021-08-03 |
| 11080052 |
Determining the effectiveness of prefetch instructions |
Michael K. Gschwind, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum |
2021-08-03 |
| 11061685 |
Extended asynchronous data mover functions compatibility indication |
Louis P. Gomes, Bruce C. Giamei, Mark S. Farrell, Matthias Klein |
2021-07-13 |
| 11061680 |
Instructions controlling access to shared registers of a multi-threaded processor |
Giora Biran, Fadi Y. Busaba, Ophir Erez, Mark S. Farrell, Lisa C. Heller +2 more |
2021-07-13 |
| 11061684 |
Architecturally paired spill/reload multiple instructions for suppressing a snapshot latest value determination |
Michael K. Gschwind, Chung-Lung K. Shum |
2021-07-13 |
| 11031951 |
Verifying the correctness of a deflate compression accelerator |
Mark S. Farrell, Bruce C. Giamei, Matthias Klein, Ashutosh Misra, Simon Weishaupt +1 more |
2021-06-08 |
| 11010192 |
Register restoration using recovery buffers |
Michael K. Gschwind, Chung-Lung K. Shum |
2021-05-18 |
| 11010066 |
Identifying processor attributes based on detecting a guarded storage event |
Dan F. Greiner, Christian Jacobi, Marcel Mitran, Volodymyr Paprotski, Anthony Saporito |
2021-05-18 |
| 10977190 |
Dynamic address translation with access control in an emulator environment |
Dan F. Greiner, Charles W. Gainey, Jr., Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer +1 more |
2021-04-13 |
| 10963391 |
Extract target cache attribute facility and instruction therefor |
Dan F. Greiner |
2021-03-30 |
| 10956156 |
Conditional transaction end instruction |
Dan F. Greiner, Christian Jacobi, Marcel Mitran, Donald W. Schmidt |
2021-03-23 |
| 10929130 |
Guarded storage event handling during transactional execution |
Dan F. Greiner, Christian Jacobi, Volodymyr Paprotski, Anthony Saporito, Chung-Lung K. Shum |
2021-02-23 |
| 10915439 |
Prefetch insensitive transactional memory |
Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum |
2021-02-09 |
| 10908903 |
Efficiency for coordinated start interpretive execution exit for a multithreaded processor |
Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Dan F. Greiner +4 more |
2021-02-02 |
| 10901736 |
Conditional instruction end operation |
Dan F. Greiner, Christian Jacobi, Marcel Mitran, Donald W. Schmidt |
2021-01-26 |
| 10884945 |
Memory state indicator check operations |
Pak-kin Mak, Craig R. Walters, Charles F. Webb |
2021-01-05 |
| 10884946 |
Memory state indicator check operations |
Pak-kin Mak, Craig R. Walters, Charles F. Webb |
2021-01-05 |
| 10884931 |
Interprocessor memory status communication |
Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum |
2021-01-05 |
