Issued Patents 2021
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11163574 | Method for maintaining a branch prediction history table | Wolfgang Gellerich, Peter M. Held, Martin Schwidefsky | 2021-11-02 |
| 11113055 | Store instruction to store instruction dependency | Edward T. Malley, Jang-Soo Lee, Anthony Saporito, Gregory W. Alexander | 2021-09-07 |
| 11080052 | Determining the effectiveness of prefetch instructions | Michael K. Gschwind, Christian Jacobi, Anthony Saporito, Timothy J. Slegel | 2021-08-03 |
| 11061684 | Architecturally paired spill/reload multiple instructions for suppressing a snapshot latest value determination | Michael K. Gschwind, Timothy J. Slegel | 2021-07-13 |
| 11048635 | Controlling a rate of prefetching based on bus bandwidth | Jonathan D. Bradbury, Michael K. Gschwind, Christian Jacobi | 2021-06-29 |
| 11010168 | Effectiveness and prioritization of prefetches | Michael K. Gschwind, Christian Jacobi, Anthony Saporito | 2021-05-18 |
| 11010160 | Load register on condition immediate instruction | Wolfgang Gellerich, Martin Schwidefsky, Kai Weber | 2021-05-18 |
| 11010192 | Register restoration using recovery buffers | Michael K. Gschwind, Timothy J. Slegel | 2021-05-18 |
| 11010276 | Configurable code fingerprint | Giles R. Frazier, Michael K. Gschwind, Christian Jacobi | 2021-05-18 |
| 11010298 | Reducing cache transfer overhead in a system | Christian Zoellin, Christian Jacobi, Martin Recktenwald, Anthony Saporito, Aaron Tsai | 2021-05-18 |
| 11003452 | Effectiveness and prioritization of prefetches | Michael K. Gschwind, Christian Jacobi, Anthony Saporito | 2021-05-11 |
| 10996982 | Regulating hardware speculative processing around a transaction | Fadi Y. Busaba, Michael K. Gschwind, Eric M. Schwarz | 2021-05-04 |
| 10956337 | Temporarily suppressing processing of a restrained storage operand request | Bruce C. Giamei, Christian Jacobi, Daniel V. Rosa, Anthony Saporito, Donald W. Schmidt | 2021-03-23 |
| 10936314 | Suppressing branch prediction on a repeated execution of an aborted transaction | Michael K. Gschwind, Valentina Salapura | 2021-03-02 |
| 10929297 | Prefetch protocol for transactional memory | Michael K. Gschwind, Valentina Salapura | 2021-02-23 |
| 10929130 | Guarded storage event handling during transactional execution | Dan F. Greiner, Christian Jacobi, Volodymyr Paprotski, Anthony Saporito, Timothy J. Slegel | 2021-02-23 |
| 10915439 | Prefetch insensitive transactional memory | Michael K. Gschwind, Valentina Salapura, Timothy J. Slegel | 2021-02-09 |
| 10884931 | Interprocessor memory status communication | Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Timothy J. Slegel | 2021-01-05 |