Issued Patents 2021
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11182269 | Proactive change verification | Daniel V. Rosa, Qi Liang, Gui Yu Jiang | 2021-11-23 |
| 11182409 | Data processing with tags | Qi Liang, Daniel V. Rosa, Gui Yu Jiang | 2021-11-23 |
| 11165679 | Establishing consumed resource to consumer relationships in computer servers using micro-trend technology | Daniel V. Rosa, Nicholas R. Jones | 2021-11-02 |
| 11153273 | Generating and managing names of instances | Nicholas Carbone, John L. Czukkermann, Michael D. Essenmacher, Kirsten B. McDonald, Gary S. Puchkoff +3 more | 2021-10-19 |
| 11150905 | Efficiency for coordinated start interpretive execution exit for a multithreaded processor | Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Dan F. Greiner +4 more | 2021-10-19 |
| 11138139 | Directed interrupt for multilevel virtualization | Bernd Nerz, Marco Kraemer, Christoph Raisch, Peter D. Driever | 2021-10-05 |
| 11044145 | Configuring and naming of cloud provisioning entities | Nicholas Carbone, John L. Czukkermann, Michael D. Essenmacher, Kirsten B. McDonald, Gary S. Puchkoff +3 more | 2021-06-22 |
| 11036661 | Directed interrupt virtualization | Christoph Raisch, Marco Kraemer, Bernd Nerz, Frank Lehnert, Peter D. Driever | 2021-06-15 |
| 11023398 | Directed interrupt virtualization with blocking indicator | Christoph Raisch, Marco Kraemer, Bernd Nerz, Sascha Junghans, Peter D. Driever | 2021-06-01 |
| 11016800 | Directed interrupt virtualization with interrupt table | Marco Kraemer, Christoph Raisch, Bernd Nerz, Frank Lehnert, Peter D. Driever | 2021-05-25 |
| 10956337 | Temporarily suppressing processing of a restrained storage operand request | Bruce C. Giamei, Christian Jacobi, Daniel V. Rosa, Anthony Saporito, Chung-Lung K. Shum | 2021-03-23 |
| 10956156 | Conditional transaction end instruction | Dan F. Greiner, Christian Jacobi, Marcel Mitran, Timothy J. Slegel | 2021-03-23 |
| 10949212 | Saving and restoring machine state between multiple executions of an instruction | Bruce C. Giamei, Martin Recktenwald, Timothy Siegel, Aditya N. Puranik, Mark S. Farrell +3 more | 2021-03-16 |
| 10922111 | Interrupt signaling for directed interrupt virtualization | Christoph Raisch, Marco Kraemer, Bernd Nerz, Peter D. Driever | 2021-02-16 |
| 10908903 | Efficiency for coordinated start interpretive execution exit for a multithreaded processor | Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Dan F. Greiner +4 more | 2021-02-02 |
| 10901736 | Conditional instruction end operation | Dan F. Greiner, Christian Jacobi, Marcel Mitran, Timothy J. Slegel | 2021-01-26 |