| 11093391 |
Representing a cache line bit pattern via meta signaling |
Saher Abu Rahme, Joydeep Ray |
2021-08-17 |
| 11074959 |
DDR memory bus with a reduced data strobe signal preamble timespan |
James A. McCall, Christopher P. Mozak, Yan Fu, Robert J. Friar, Hsien-Pao Yang |
2021-07-27 |
| 11061590 |
Efficiently training memory device chip select control |
Tonia G. Morris, Christopher P. Mozak |
2021-07-13 |
| 11042315 |
Dynamically programmable memory test traffic router |
Lakshminarayana Pappu, Navneet Dour, Asaf Rubinstein, Israel Diamand |
2021-06-22 |
| 10969979 |
Input/output (I/O) loopback function for I/O signaling testing |
Dean-Dexter R. Eugenio, Arvind Kumar, John R. Goles |
2021-04-06 |
| 10950288 |
Refresh command control for host assist of row hammer mitigation |
Bill Nale |
2021-03-16 |
| 10938161 |
Snap-on electromagnetic interference (EMI)-shielding without motherboard ground requirement |
Jaejin Lee, Jun Liao, Xiang Li |
2021-03-02 |
| 10923859 |
Crosstalk reducing connector pin geometry |
Jaejin Lee, Jun Liao, Xiang Li, George Vergis |
2021-02-16 |
| 10890931 |
Memory module thermal management |
Ishmael F. Santos, Corinne Hall |
2021-01-12 |