Issued Patents 2021
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11210064 | Parallelized rounding for decimal floating point to binary coded decimal conversion | Stefan Payer, Silvia M. Mueller, Nicol Hofmann | 2021-12-28 |
| 11159183 | Residue checking of entire normalizer output of an extended result | Nicol Hofmann, Michael Klein, Kerstin Claudia Schelm | 2021-10-26 |
| 11099602 | Fault-tolerant clock gating | Cedric Lichtenau, Stefan Payer, Michael Klein | 2021-08-24 |
| 11068541 | Vector string search instruction | Cedric Lichtenau, Jonathan D. Bradbury, Eric M. Schwarz, Stefan Payer | 2021-07-20 |
| 11042371 | Plausability-driven fault detection in result logic and condition codes for fast exact substring match | Stefan Payer, Cedric Lichtenau, Kerstin Claudia Schelm | 2021-06-22 |
| 10996951 | Plausibility-driven fault detection in string termination logic for fast exact substring match | Stefan Payer, Petra Leber, Cedric Lichtenau | 2021-05-04 |