Issued Patents 2021
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11210064 | Parallelized rounding for decimal floating point to binary coded decimal conversion | Stefan Payer, Silvia M. Mueller, Razvan Peter Figuli | 2021-12-28 |
| 11188299 | Repurposed hexadecimal floating point data path | Michael Klein, Petra Leber, Kerstin Claudia Schelm | 2021-11-30 |
| 11175890 | Hexadecimal exponent alignment for binary floating point unit | Kerstin Claudia Schelm, Petra Leber, Michael Klein | 2021-11-16 |
| 11159183 | Residue checking of entire normalizer output of an extended result | Michael Klein, Kerstin Claudia Schelm, Razvan Peter Figuli | 2021-10-26 |
| 10890622 | Integrated circuit control latch protection | Stefan Payer, Michael Klein, Cedric Lichtenau | 2021-01-12 |