Issued Patents 2021
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11184221 | Yield tolerance in a neurosynaptic system | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Bryan L. Jackson, Dharmendra S. Modha +1 more | 2021-11-23 |
| 11074496 | Providing transposable access to a synapse array using a recursive array layout | John V. Arthur, John E. Barth, Jr., Dharmendra S. Modha | 2021-07-27 |
| 11049001 | Event-based neural network with hierarchical addressing for routing event packets between core circuits of the neural network | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Bryan L. Jackson, Dharmendra S. Modha +1 more | 2021-06-29 |
| 10990872 | Energy-efficient time-multiplexed neurosynaptic core for implementing neural networks spanning power- and area-efficiency | Filipp A. Akopyan, Rodrigo Alvarez-Icaza, John V. Arthur, Andrew S. Cassidy, Steven K. Esser +3 more | 2021-04-27 |
| 10984312 | Mapping graphs onto core-based neuromorphic architectures | Arnon Amir, Pallab Datta, Dharmendra S. Modha | 2021-04-20 |
| 10984307 | Peripheral device interconnections for neurosynaptic systems | Filipp A. Akopyan, Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Bryan L. Jackson +2 more | 2021-04-20 |
| 10929747 | Dual deterministic and stochastic neurosynaptic core circuit | Rodrigo Alvarez-Icaza, John V. Arthur, Andrew S. Cassidy, Bryan L. Jackson, Dharmendra S. Modha +1 more | 2021-02-23 |