ML

Meng-Han Lin

TSMC: 16 patents #91 of 3,471Top 3%
Overall (2020): #3,277 of 565,922Top 1%
16
Patents 2020

Issued Patents 2020

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDate
10879251 Integrated circuit and manufacturing method thereof Chin Wen CHAN, Chih-Ren Hsieh 2020-12-29
10868108 Semiconductor device having high voltage lateral capacitor and manufacturing method thereof Te-Hsin Chiu, Wei-Cheng Wu, Te-An Chen 2020-12-15
10868027 Structure and method for preventing silicide contamination during the manufacture of micro-processors with embedded flash memory Wei-Cheng Wu 2020-12-15
10868026 Method to improve fill-in window for embedded memory Te-Hsin Chiu, Wei-Cheng Wu 2020-12-15
10861951 Transistor layout to reduce kink effect Te-Hsin Chiu, Wei-Cheng Wu 2020-12-08
10804093 Dishing prevention columns for bipolar junction transistors Yi-Huan Chen, Chien-Chih Chou, Kong-Beng Thei 2020-10-13
10804220 Dishing prevention columns for bipolar junction transistors Yi-Huan Chen, Chien-Chih Chou, Kong-Beng Thei 2020-10-13
10804281 Anti-dishing structure for embedded memory Chih-Ren Hsieh, Chen-Chin Liu, Chih-Pin Huang 2020-10-13
10784270 Method to improve fill-in window for embedded memory Te-Hsin Chiu, Wei-Cheng Wu 2020-09-22
10770469 Semiconductor device and method of manufacturing the same Chih-Ren Hsieh, Chin Wen CHAN 2020-09-08
10741555 Metal gate modulation to improve kink effect Te-Hsin Chiu, Wei-Cheng Wu 2020-08-11
10734292 Method for testing bridging in adjacent semiconductor devices and test structure Chia-Lin LIANG, Chih-Ren Hsieh 2020-08-04
10665595 Metal isolation testing in the context of memory cells Te-Hsin Chiu, Wei-Cheng Wu 2020-05-26
10644000 Semiconductor device having deep wells Chih-Ren Hsieh, Chen-Chin Liu 2020-05-05
10644013 Cell boundary structure for embedded memory Chih-Ren Hsieh, Wei-Cheng Wu, Chih-Pin Huang 2020-05-05
10535574 Cell-like floating-gate test structure Chih-Ren Hsieh, Ya-Chen Kao, Chen-Chin Liu, Chih-Pin Huang 2020-01-14