Issued Patents 2020
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10878163 | Semiconductor device including PG-aligned cells and method of generating layout of same | Hiranmay Biswas, Chung-Hsing Wang | 2020-12-29 |
| 10867103 | Method and system for forming conductive grid of integrated circuit | Hiranmay Biswas, Chung-Hsing Wang | 2020-12-15 |
| 10868538 | Logic cell structure and integrated circuit with the logic cell structure | Shao-Huan Wang, Chun-Chen Chen, Sheng-Hsiung Chen | 2020-12-15 |
| 10867916 | Via sizing for IR drop reduction | Hiranmay Biswas, Chin-Shen Lin, Chung-Hsing Wang | 2020-12-15 |
| 10726174 | System and method for simulating reliability of circuit design | Chin-Shen Lin, Meng-Xiang Lee, Chung-Hsing Wang | 2020-07-28 |
| 10678990 | Techniques based on electromigration characteristics of cell interconnect | Chung-Hsing Wang, Yi-Kan Cheng, Kumar Lalgudi | 2020-06-09 |
| 10672709 | Power grid, IC and method for placing power grid | Hiranmay Biswas, Chung-Hsing Wang | 2020-06-02 |
| 10664641 | Integrated device and method of forming the same | Hiranmay Biswas, Chung-Hsing Wang, Meng-Xiang Lee | 2020-05-26 |
| 10643986 | Power gating for three dimensional integrated circuits (3DIC) | Chien-Ju Chao, Chou-Kun Lin, Yi-Chuin Tsai, Yen-Hung Lin, Po-Hsiang Huang +1 more | 2020-05-05 |