Issued Patents 2020
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10790391 | Source/drain epitaxial layer profile | Hsin-Chi Chen, Kun-Tsang Chuang | 2020-09-29 |
| 10748911 | Integrated circuit for low power SRAM | Shun-Chi TSAI, Chih-Ming Lee, Chi-Yen Lin, Kuo-Hung Lo | 2020-08-18 |
| 10734489 | Method for forming semiconductor device structure with metal silicide layer | Cheng-Yeh Huang, Chin-Nan Chang, Chih-Ming Lee, Chi-Yen Lin | 2020-08-04 |
| 10727191 | Semiconductor device with post passivation structure | Chih-Ming Lee, Chi-Yen Lin, Wen-Chang Kuo, C. C. Liu | 2020-07-28 |
| 10672795 | Bulk semiconductor substrate configured to exhibit semiconductor-on-insulator behavior | Kun-Tsang Chuang, Hsin-Chi Chen | 2020-06-02 |
| 10636870 | Isolation regions for reduced junction leakage | Hsin-Chi Chen, Kun-Tsang Chuang | 2020-04-28 |
| 10636695 | Negatively sloped isolation structures | Tsung-Han Tsai, Kun-Tsang Chuang | 2020-04-28 |
| 10546937 | Structures and methods for noise isolation in semiconductor devices | Tsung-Han Tsai, Kun-Tsang Chuang | 2020-01-28 |