VM

Victor Moroz

SY Synopsys: 14 patents #1 of 283Top 1%
Overall (2020): #4,167 of 565,922Top 1%
14
Patents 2020

Issued Patents 2020

Patent #TitleCo-InventorsDate
10831957 Simulation scaling with DFT and non-DFT Jie Liu, Michael C. Shaughnessy-Culver, Stephen Lee Smith, Yong-Seog Oh, Pratheep Balasingam +1 more 2020-11-10
10776560 Mapping intermediate material properties to target properties to screen materials Stephen Lee Smith, Yong-Seog Oh, Michael C. Shaughnessy-Culver, Jie Liu, Terry Sylvan Kam-Chiu Ma 2020-09-15
10776552 Nano-wire resistance model Ibrahim Avci, Shuqing Li, Philippe Roussel, Ivan Ciofi 2020-09-15
10756212 FinFET with heterojunction and improved channel control Stephen Lee Smith, Qiang Lu 2020-08-25
10741538 Method and apparatus for floating or applying voltage to a well of an integrated circuit Jamil Kawa, James David Sproch, Robert B. Lefferts 2020-08-11
10706209 Estimation of effective channel length for FinFETs and nano-wires Yong-Seog Oh, Stephen Lee Smith, Michael C. Shaughnessy-Culver, Jie Liu 2020-07-07
10699914 On-chip heating and self-annealing in FinFETs with anti-punch-through implants Hiu Yung Wong, Qiang Lu 2020-06-30
10685156 Multi-scale simulation including first principles band structure extraction Jie Liu, Michael C. Shaughnessy-Culver, Stephen Lee Smith, Yong-Seog Oh, Pratheep Balasingam +1 more 2020-06-16
10685163 Computationally efficient nano-scale conductor resistance model Karim El Sayed 2020-06-16
10679719 Enhancing memory yield and performance through utilizing nanowire self-heating Jamil Kawa 2020-06-09
10665320 Logic timing and reliability repair for nanowire circuits Jamil Kawa 2020-05-26
10606968 Atomic scale grid for modeling semiconductor structures and fabrication processes Stephen Lee Smith 2020-03-31
10586588 Reversing the effects of hot carrier injection and bias threshold instability in SRAMs Jamil Kawa, Thu Nguyen 2020-03-10
10572615 Placement and routing of cells using cell-level layout-dependent stress effects 2020-02-25