Issued Patents 2020
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10727844 | Reference clock frequency change handling in a phase-locked loop | Xue-Mei Gong, James D. Barnette | 2020-07-28 |
| 10727845 | Use of a virtual clock in a PLL to maintain a closed loop system | James D. Barnette | 2020-07-28 |
| 10651862 | Locking a PLL to the nearest edge of the input clock when the input clock is divided down before use in the PLL | James D. Barnette | 2020-05-12 |