Issued Patents 2020
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10826507 | Fractional divider with error correction | Xue-Mei Gong | 2020-11-03 |
| 10819354 | Accurate and reliable digital PLL lock indicator | Kannanthodath V. Jayakumar | 2020-10-27 |
| 10727845 | Use of a virtual clock in a PLL to maintain a closed loop system | Krishnan Balakrishnan | 2020-07-28 |
| 10727844 | Reference clock frequency change handling in a phase-locked loop | Xue-Mei Gong, Krishnan Balakrishnan | 2020-07-28 |
| RE48130 | Method for switching master/slave timing in a 1000Base-T link without traffic disruption | Mandeep Singh Chadha, James A. McIntosh | 2020-07-28 |
| 10693475 | Gradual frequency transition with a frequency step | Xue-Mei Gong | 2020-06-23 |
| 10651862 | Locking a PLL to the nearest edge of the input clock when the input clock is divided down before use in the PLL | Krishnan Balakrishnan | 2020-05-12 |
| 10608649 | Relative frequency offset error and phase error detection for clocks | Kannanthodath V. Jayakumar | 2020-03-31 |