| 10847452 |
Non-volatile memory with capacitors using metal under signal line or above a device capacitor |
Luisa Lin, Mohan Dunga, Venkatesh Ramachandra, Masaaki Higashitani |
2020-11-24 |
| 10840259 |
Three-dimensional memory device including liner free molybdenum word lines and methods of making the same |
Raghuveer S. Makala, Masaaki Higashitani |
2020-11-17 |
| 10789992 |
Non-volatile memory with capacitors using metal under pads |
Luisa Lin, Mohan Dunga, Venkatesh Ramachandra, Masaaki Higashitani |
2020-09-29 |
| 10763271 |
Three-dimensional memory device containing aluminum-silicon word lines and methods of manufacturing the same |
Masaaki Higashitani, Jayavel Pachamuthu |
2020-09-01 |
| 10755788 |
Impedance mismatch mitigation scheme that applies asymmetric voltage pulses to compensate for asymmetries from applying symmetric voltage pulses |
Kwang Ho Kim, Masaaki Higashitani, Yingda Dong |
2020-08-25 |
| 10726926 |
Hot-cold VTH mismatch using VREAD modulation |
Dae Wung Kang, Masaaki Higashitani |
2020-07-28 |
| 10650898 |
Erase operation in 3D NAND flash memory including pathway impedance compensation |
Kwang Ho Kim, Masaaki Higashitani, Yingda Dong |
2020-05-12 |