Issued Patents 2020
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10819342 | Low-power low-setup integrated clock gating cell with complex enable selection | Lalitkumar Motagi | 2020-10-27 |
| 10784198 | Power rail for standard cell block | Rwik Sengupta, Andrew Paul Hoover, Sam Tower, Mark S. Rodder | 2020-09-22 |
| 10784864 | Low power integrated clock gating system and method | Lalitkumar Motagi, Shyam Agarwal | 2020-09-22 |
| 10748889 | Power grid and standard cell co-design structure and methods thereof | Andrew Paul Hoover, Christopher Alan Peura | 2020-08-18 |
| 10720204 | System and method for improving scan hold-time violation and low voltage operation in sequential circuit | — | 2020-07-21 |
| 10607982 | Layout connection isolation technique for improving immunity to jitter and voltage drop in a standard cell | Charles A. Cornell | 2020-03-31 |
| 10581410 | High speed domino-based flip flop | James Jung Lim | 2020-03-03 |