Issued Patents 2020
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10804153 | Semiconductor device and method to minimize stress on stack via | Seng Guan Chow | 2020-10-13 |
| 10790158 | Semiconductor device and method of balancing surfaces of an embedded PCB unit with a dummy copper pattern | Kang Chen, Hin Hwa Goh, Il Kwon Shim | 2020-09-29 |
| 10777528 | Semiconductor device and method of forming embedded wafer level chip scale packages | Pandi C. Marimuthu, Il Kwon Shim, Byung Joon Han | 2020-09-15 |
| 10741416 | Semiconductor device and method of forming embedded conductive layer for power/ground planes in Fo-eWLB | Xu Sheng Bao, Kang Chen | 2020-08-11 |
| 10730745 | Semiconductor device and method of forming MEMS package | Il Kwon Shim | 2020-08-04 |
| 10707150 | Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units | Il Kwon Shim, Pandi C. Marimuthu, Kang Chen, Yu Gu | 2020-07-07 |
| 10662056 | Semiconductor device and method of forming microelectromechanical systems (MEMS) package | Won Kyoung Choi, Kang Chen, Ivan Micallef | 2020-05-26 |
| 10658330 | Semiconductor device and method of using a standardized carrier to form embedded wafer level chip scale packages | Byung Joon Han, Il Kwon Shim, Pandi C. Marimuthu | 2020-05-19 |
| 10636753 | Antenna in embedded wafer-level ball-grid array package | Pandi C. Marimuthu, Andy Chang Bum Yong, Aung Kyaw Oo | 2020-04-28 |
| 10629531 | Semiconductor device and method of fabricating 3D package with short cycle time and high yield | — | 2020-04-21 |
| 10622293 | Semiconductor device and method for forming a low profile embedded wafer level ball grid array molded laser package (EWLB-MLP) | Seung Wook Yoon, Jose Alvin Caparas, Pandi C. Marimuthu, Kang Chen, Xusheng Bao +1 more | 2020-04-14 |
| 10607946 | Semiconductor device and method of forming interconnect substrate for FO-WLCSP | Jianmin Fang, Xia Feng, Kang Chen | 2020-03-31 |