Issued Patents 2020
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10678983 | Local retiming optimization for circuit designs | Chaithanya Dudha, Bing Tian, Ashish Sirasao | 2020-06-09 |
| 10664561 | Automatic pipelining of memory circuits | Pradip Kar, Satyaprakash Pareek, Bing Tian | 2020-05-26 |
| 10606979 | Verifying equivalence of design latency | Bing Tian, Chaithanya Dudha | 2020-03-31 |