Issued Patents 2020
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 10747502 | Multiply and accumulate circuit | Satyaprakash Pareek, Anup Hosangadi, Ashish Sirasao, Yao Fu, Oscar Fernando C. Fernandez +2 more | 2020-08-18 | $22,481,000 |
| 10726175 | Systems for optimization of read-only memory (ROM) | Chaithanya Dudha, Satyaprakash Pareek, Ashish Sirasao | 2020-07-28 | $29,850,000 |
| 10678983 | Local retiming optimization for circuit designs | Shangzhi Sun, Chaithanya Dudha, Ashish Sirasao | 2020-06-09 | $35,785,000 |
| 10664561 | Automatic pipelining of memory circuits | Pradip Kar, Satyaprakash Pareek, Shangzhi Sun | 2020-05-26 | $26,778,000 |
| 10606979 | Verifying equivalence of design latency | Shangzhi Sun, Chaithanya Dudha | 2020-03-31 | $43,044,000 |