Issued Patents 2020
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10776690 | Neural network unit with plurality of selectable output functions | Terry Parks | 2020-09-15 |
| 10725934 | Processor with selective data storage (of accelerator) operable as either victim cache data storage or accelerator memory and having victim cache tags in lower level cache wherein evicted cache line is stored in said data storage when said data storage is in a first mode and said cache line is stored in system memory rather then said data store when said data storage is in a second mode | Terry Parks, Douglas R. Reed | 2020-07-28 |
| 10671564 | Neural network unit that performs convolutions using collective shift register among array of neural processing units | Terry Parks, Kyle T. O'Brien | 2020-06-02 |
| 10664751 | Processor with memory array operable as either cache memory or neural network unit memory | Douglas R. Reed | 2020-05-26 |
| 10642617 | Processor with an expandable instruction set architecture for dynamically configuring execution resources | Rodney E. Hooker, Terry Parks, Douglas R. Reed | 2020-05-05 |
| 10635453 | Dynamic reconfiguration of multi-core processor | Terry Parks, Darius D. Gaskins | 2020-04-28 |
| 10586148 | Neural network unit with re-shapeable memory | Kim C. Houck, Parviz Palangpour | 2020-03-10 |
| 10585848 | Processor with hybrid coprocessor/execution unit neural network unit | Terry Parks | 2020-03-10 |
| 10565494 | Neural network unit with segmentable array width rotator | Kim C. Houck, Parviz Palangpour | 2020-02-18 |
| 10565492 | Neural network unit with segmentable array width rotator | Kim C. Houck, Parviz Palangpour | 2020-02-18 |
| 10552370 | Neural network unit with output buffer feedback for performing recurrent neural network computations | Terry Parks, Kyle T. O'Brien | 2020-02-04 |