| 10782968 |
Rapid substring detection within a data element string |
Razvan Peter Figuli, Stefan Payer, Kerstin Claudia Schelm |
2020-09-22 |
| 10768232 |
ATE compatible high-efficient functional test |
Thomas Gentner, Jens Kuenzer, Martin Padeffke |
2020-09-08 |
| 10754773 |
Selection of variable memory-access size |
Andreea Anghel, Gero Dittmann, Peter Altevogt, Thomas Pflueger |
2020-08-25 |
| 10746794 |
Logic built in self test circuitry for use in an integrated circuit with scan chains |
Satya R. S. Bhamidipati, Raghu G. GopalaKrishnaSetty, Mary P. Kusko |
2020-08-18 |
| 10747819 |
Rapid partial substring matching |
Stefan Payer, Razvan Peter Figuli, Nicol Hofmann |
2020-08-18 |
| 10739401 |
Logic built in self test circuitry for use in an integrated circuit with scan chains |
Satya R. S. Bhamidipati, Raghu G. GopalaKrishnaSetty, Mary P. Kusko |
2020-08-11 |
| 10740098 |
Aligning most significant bits of different sized elements in comparison result vectors |
Silvia M. Mueller, Jens Seifert, Jörg-Stephan Vogt, Markus Lachenmayr, L'Emir Salim Chehab +2 more |
2020-08-11 |
| 10732972 |
Non-overlapping substring detection within a data element string |
Razvan Peter Figuli, Stefan Payer, Petra Leber |
2020-08-04 |
| 10684861 |
Enhanced performance-aware instruction scheduling |
Peter Altevogt, Thomas Pflueger |
2020-06-16 |
| 10649781 |
Enhanced performance-aware instruction scheduling |
Peter Altevogt, Thomas Pflueger |
2020-05-12 |
| 10649730 |
Normalization of a product on a datapath |
Klaus M. Kroener, Silvia M. Mueller, Andreas Wagner |
2020-05-12 |
| 10649028 |
Logic built in self test circuitry for use in an integrated circuit with scan chains |
Satya R. S. Bhamidipati, Raghu G. GopalaKrishnaSetty, Mary P. Kusko |
2020-05-12 |
| 10598727 |
Identification of unknown sources for logic built-in self test in verification |
Satya R. S. Bhamidipati, Mary P. Kusko, Srinivas V. N. Polisetty |
2020-03-24 |
| 10579375 |
Method to build reconfigurable variable length comparators |
Silvia M. Mueller, Jens Seifert, Jörg-Stephan Vogt, Markus Lachenmayr, L'Emir Salim Chehab +2 more |
2020-03-03 |
| 10558432 |
Multiply-add operations of binary numbers in an arithmetic unit |
Tina Babinsky, Michael Klein, Silvia M. Mueller |
2020-02-11 |
| 10552167 |
Clock-gating for multicycle instructions |
Juergen Haess, Stefan Payer, Kerstin Claudia Schelm |
2020-02-04 |
| 10528354 |
Performance-aware instruction scheduling |
Peter Altevogt, Thomas Pflueger |
2020-01-07 |
