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Multi-resolution image plane rendering within an improved graphics processor microarchitecture |
Michael Apodaca, Prasoonkumar Surti, Karthik Vaidyanathan, Murali Ramadoss, Abhishek Venkatesh +1 more |
2020-12-15 |
| 10783603 |
Graphics processor with tiled compute kernels |
Abhishek Venkatesh, Prasoonkumar Surti, Louis Feng, Kai Xiao, Tomasz Janczak +2 more |
2020-09-22 |
| 10733692 |
Interface apparatus and method resilient to graphics hardware changes |
Jason M. Surprise, Zack Waters, Mike Apodaca |
2020-08-04 |
| 10672175 |
Order independent asynchronous compute and streaming for graphics |
Devan Burke, Adam T. Lake, Jeffery S. Boles, John H. Feit, Karthik Vaidyanathan +11 more |
2020-06-02 |
| 10643374 |
Positional only shading pipeline (POSH) geometry data processing with coarse Z buffer |
Prasoonkumar Surti, Karthik Vaidyanathan, Atsuo Kuwahara, Hugues Labbe, Sameer Kp +15 more |
2020-05-05 |
| 10636112 |
Graphics processor register data re-use mechanism |
Kaiyu Chen, Guei-Yuan Lueh, Subramaniam Maiyuran |
2020-04-28 |