Issued Patents 2020
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10854757 | FINFET based junctionless wrap around structure | Rahul Ramaswamy, Hsu-Yu Chang, Chia-Hong Jan, Walid M. Hafez, Neville L. Dias +1 more | 2020-12-01 |
| 10811751 | Monolithic splitter using re-entrant poly silicon waveguides | Rahul Ramaswamy, Chia-Hong Jan, Walid M. Hafez, Neville L. Dias, Hsu-Yu Chang +1 more | 2020-10-20 |
| 10784378 | Ultra-scaled fin pitch having dual gate dielectrics | Walid M. Hafez, Joodong Park, Chen-Guan Lee, Chia-Hong Jan, Everett S. Cassidy-Comfort | 2020-09-22 |
| 10763209 | MOS antifuse with void-accelerated breakdown | Walid M. Hafez, Chia-Hong Jan, Hsu-Yu Chang, Ting Chang, Rahul Ramaswamy +2 more | 2020-09-01 |
| 10761264 | Transmission lines using bending fins from local stress | Rahul Ramaswamy, Chia-Hong Jan, Walid M. Hafez, Neville L. Dias, Hsu-Yu Chang +1 more | 2020-09-01 |
| 10756210 | Depletion mode gate in ultrathin FINFET based architecture | Chia-Hong Jan, Walid M. Hafez, Hsu-Yu Chang, Neville L. Dias, Rahul Ramaswamy +1 more | 2020-08-25 |
| 10692771 | Non-planar I/O and logic semiconductor devices having different workfunction on common substrate | Walid M. Hafez, Chia-Hong Jan, Pei-Chi Liu | 2020-06-23 |