Issued Patents 2020
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10795823 | Dynamic partial power down of memory-side cache in a 2-level memory hierarchy | Raj K. Ramanujan, David J. Zimmerman | 2020-10-06 |
| 10719443 | Apparatus and method for implementing a multi-level memory hierarchy | Raj K. Ramanujan, Rajat Agarwal, Kai Cheng, Taarinya Polepeddi, Camille C. Raad +5 more | 2020-07-21 |
| 10564986 | Methods and apparatus to suspend and resume computing systems | Michael A. Rothman, Vincent J. Zimmer, Barnes Cooper, Leena K. Puthiyedath | 2020-02-18 |