Issued Patents 2020
Showing 26–38 of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10599432 | Computer system performance analyzer | Ramon Bertran, Pradip Bose, Alper Buyuktosunoglu | 2020-03-24 |
| 10599435 | Nontransactional store instruction | Dan F. Greiner, Christian Jacobi | 2020-03-24 |
| 10592142 | Toggling modal transient memory access state | Michael K. Gschwind, Christian Jacobi, Younes Manton, Anthony Saporito | 2020-03-17 |
| 10579499 | Task latency debugging in symmetric multiprocessing computer systems | Eberhard Engler, Christian Jacobi, Scott Barnett Swaney | 2020-03-03 |
| 10579514 | Alignment based block concurrency for accessing memory | Jonathan D. Bradbury, Michael K. Gschwind, Christian Jacobi | 2020-03-03 |
| 10579377 | Guarded storage event handling during transactional execution | Dan F. Greiner, Christian Jacobi, Volodymyr Paprotski, Anthony Saporito, Chung-Lung K. Shum | 2020-03-03 |
| 10572265 | Selecting register restoration or register reloading | Michael K. Gschwind, Chung-Lung K. Shum | 2020-02-25 |
| 10572254 | Instruction to query cache residency | Dan F. Greiner, Michael K. Gschwind, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum | 2020-02-25 |
| 10565003 | Hint instruction for managing transactional aborts in transactional memory computing environments | Fadi Y. Busaba, Harold W. Cain, III, Dan F. Greiner, Michael K. Gschwind, Maged M. Michael +2 more | 2020-02-18 |
| 10564977 | Selective register allocation | Michael K. Gschwind, Chung-Lung K. Shum | 2020-02-18 |
| 10558465 | Restricted instructions in transactional execution | Dan F. Greiner, Christian Jacobi | 2020-02-11 |
| 10558560 | Prefetch insensitive transactional memory | Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum | 2020-02-11 |
| 10552164 | Sharing snapshots between restoration and recovery | Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum | 2020-02-04 |