Issued Patents 2020
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10877864 | Controlling segment layout in a stress test for a processor memory with a link stack | Manoj Dusanapudi | 2020-12-29 |
| 10748637 | System and method for testing processor errors | Nelson Wu, Manoj Dusanapudi, Nandhini Rajaiah | 2020-08-18 |
| 10713179 | Efficiently generating effective address translations for memory management test cases | Manoj Dusanapudi | 2020-07-14 |
| 10579376 | Processor performance monitor that logs reasons for reservation loss | John A. Schumann, Karen Yokum | 2020-03-03 |
| 10540249 | Stress testing a processor memory with a link stack | Manoj Dusanapudi | 2020-01-21 |
| 10528476 | Embedded page size hint for page fault resolution | — | 2020-01-07 |