Issued Patents 2020
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10740282 | Interconnect circuits at three-dimensional (3-D) bonding interfaces of a processor array | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Subramanian S. Iyer, Bryan L. Jackson +3 more | 2020-08-11 |
| 10706916 | Method and apparatus for integrated level-shifter and memory clock | Harold Pilo | 2020-07-07 |
| 10650906 | Memory bypass function for a memory | Kevin W. Gorman, Harold Pilo | 2020-05-12 |