| 10838857 |
Multi-section garbage collection |
Giles R. Frazier, Michael K. Gschwind, Younes Manton, Karl M. Taylor |
2020-11-17 |
| 10831501 |
Managing an issue queue for fused instructions and paired instructions in a microprocessor |
Michael J. Genden, Hung Q. Le, Dung Q. Nguyen |
2020-11-10 |
| 10831498 |
Managing an issue queue for fused instructions and paired instructions in a microprocessor |
Michael J. Genden, Hung Q. Le, Dung Q. Nguyen |
2020-11-10 |
| 10831481 |
Handling unaligned load operations in a multi-slice computer processor |
Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le, Jentje Leenstra +2 more |
2020-11-10 |
| 10824430 |
Resolving operand store compare conflicts |
Ehsan Fatehi |
2020-11-03 |
| 10802964 |
Multi-section garbage collection method |
Giles R. Frazier, Michael K. Gschwind, Younes Manton, Karl M. Taylor |
2020-10-13 |
| 10776275 |
Cache data replacement in a networked computing system using reference states based on reference attributes |
Bernard C. Drerup, Mohit Karve |
2020-09-15 |
| 10747545 |
Dual compare of least-significant-bit for dependency wake up from a fused instruction tag in a microprocessor |
Michael J. Genden, Hung Q. Le, Dung Q. Nguyen |
2020-08-18 |
| 10740107 |
Operation of a multi-slice processor implementing load-hit-store handling |
Salma Ayub, Joshua W. Bowman, Jeffrey C. Brownscheidle, Kurt A. Feiste, Dung Q. Nguyen +1 more |
2020-08-11 |
| 10691459 |
Converting multiple instructions into a single combined instruction with an extension opcode |
Giles R. Frazier, Hung Q. Le, Jose E. Moreira |
2020-06-23 |
| 10684856 |
Converting multiple instructions into a single combined instruction with an extension opcode |
Giles R. Frazier, Hung Q. Le, Jose E. Moreira |
2020-06-16 |
| 10671539 |
Cache line replacement using reference states based on data reference attributes |
Bernard C. Drerup, Mohit Karve |
2020-06-02 |
| 10671394 |
Prefetch stream allocation for multithreading systems |
Vivek Britto, George W. Rohrbaugh, III, Mohit Karve |
2020-06-02 |
| 10564978 |
Operation of a multi-slice processor with an expanded merge fetching queue |
Kimberly M. Fernsler, David A. Hrusecky, Hung Q. Le, Elizabeth A. McGlone |
2020-02-18 |
| 10545762 |
Independent mapping of threads |
Sam Gat-Shang Chu, Markus Kaltenbach, Hung Q. Le, Jentje Leenstra, Jose E. Moreira +1 more |
2020-01-28 |
