YW

Yosinori Watanabe

CS Cadence Design Systems: 1 patents #84 of 328Top 30%
📍 Lafayette, CA: #40 of 97 inventorsTop 45%
🗺 California: #27,826 of 68,989 inventorsTop 45%
Overall (2020): #210,044 of 565,922Top 40%
1
Patents 2020

Issued Patents 2020

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10607039 Constrained metric optimization of a system on chip Yael Kinderman, Shlomi Uziel, Ido Avraham, Michele Petracca 2020-03-31