YS

Yaron Schiller

CS Cadence Design Systems: 2 patents #41 of 328Top 15%
Overall (2020): #105,771 of 565,922Top 20%
2
Patents 2020

Issued Patents 2020

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10853546 Method and system for sequential equivalence checking Almothana Sirhan, Karam Abdelkader, Habeeb Farah, Thiago Radicchi Roque 2020-12-01
10782767 System, method, and computer program product for clock gating in a formal verification Karam Abd Elkader, Doron Bustan, Habeeb Farah 2020-09-22