VC

Vivek Chickermane

CS Cadence Design Systems: 7 patents #3 of 328Top 1%
Overall (2020): #16,323 of 565,922Top 3%
7
Patents 2020

Issued Patents 2020

Patent #TitleCo-InventorsDate
10796041 Compacting test patterns for IJTAG test Rajesh Khurana, Divyank Mittal, Balveer Singh Koranga 2020-10-06
10775435 Low-power shift with clock staggering Christos Papameletis, Brian Foutz, Krishna Vijaya Chakravadhanula 2020-09-15
10761131 Method for optimally connecting scan segments in two-dimensional compression chains Christos Papameletis, Brian Foutz, Krishna Vijaya Chakravadhanula 2020-09-01
10747922 Test circuitry with annularly arranged compressor and decompressor elements Akhil Garg, Sahil Jain 2020-08-18
10740515 Devices and methods for test point insertion coverage Jagjot Kaur, Priyanka Dasgupta, Gopi Kudva 2020-08-11
10551435 2D compression-based low power ATPG Nitin Parimi, Krishna Vijaya Chakravadhanula, Patrick Gallagher, Brian Foutz 2020-02-04
10528689 Verification process for IJTAG based test pattern migration Rajesh Khurana, Dhruv Dua, Krishna Vijaya Chakravadhanula 2020-01-07