RK

Rajesh Khurana

CS Cadence Design Systems: 2 patents #41 of 328Top 15%
📍 Noida, IN: #11 of 138 inventorsTop 8%
Overall (2020): #130,460 of 565,922Top 25%
2
Patents 2020

Issued Patents 2020

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10796041 Compacting test patterns for IJTAG test Vivek Chickermane, Divyank Mittal, Balveer Singh Koranga 2020-10-06
10528689 Verification process for IJTAG based test pattern migration Vivek Chickermane, Dhruv Dua, Krishna Vijaya Chakravadhanula 2020-01-07