PG

Patrick Gallagher

CS Cadence Design Systems: 4 patents #11 of 328Top 4%
Overall (2020): #47,159 of 565,922Top 9%
4
Patents 2020

Issued Patents 2020

Patent #TitleCo-InventorsDate
10706950 Testing for memory error correction code logic Steven Lee Gregor 2020-07-07
10706952 Testing for memories during mission mode self-test Steven Lee Gregor 2020-07-07
10551435 2D compression-based low power ATPG Nitin Parimi, Krishna Vijaya Chakravadhanula, Vivek Chickermane, Brian Foutz 2020-02-04
10541043 On demand data stream controller for programming and executing operations in an integrated circuit Carl Wisnesky, II, Steven Lee Gregor, Norman Robert Card 2020-01-21