Issued Patents 2020
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10825772 | Redundancy scheme for multi-chip stacked devices | Brian C. Gaide | 2020-11-03 |
| 10715149 | Configurable logic block (CLB) internal routing architecture for enhanced local routing and clocking improvements | Eric F. Dellinger, Jay T. Young, Brian C. Gaide, Chirag Ravishankar, Davis Boyd MOORE | 2020-07-14 |