Issued Patents 2019
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10521545 | Placement constraint method for multiple patterning of cell-based chip design | Shao-Huan Wang, Fong-Yuan Chang, Po-Hsiang Huang | 2019-12-31 |
| 10515944 | Integrated circuit and method of generating integrated circuit layout | Fong-Yuan Chang, Kuo-Nan Yang, Chung-Hsing Wang, Lee-Chung Lu, Sheng-Fong Chen +3 more | 2019-12-24 |
| 10509887 | Must-join pin sign-off method | Ming-Huei Tsai, Shao-Huan Wang, Shu-Yu Chen, Wen-Hao Chen, Chun-Chen Chen | 2019-12-17 |
| 10402534 | Integrated circuit layout methods, structures, and systems | Po-Hsiang Huang, Fong-Yuan Chang | 2019-09-03 |
| 10396063 | Circuit with combined cells and method for manufacturing the same | Fong-Yuan Chang, Lee-Chung Lu, Yi-Kan Cheng, Po-Hsiang Huang, Shun Li Chen +4 more | 2019-08-27 |
| 10312192 | Integrated circuit having staggered conductive features | Fong-Yuan Chang, Po-Hsiang Huang, Jyun-Hao Chang, Chun-Chen Chen | 2019-06-04 |
| 10289794 | Layout for semiconductor device including via pillar structure | Shao-Huan Wang, Wen-Hao Chen, Chun-Chen Chen, Hung-Chih Ou | 2019-05-14 |
| 10262981 | Integrated circuit, system for and method of forming an integrated circuit | Fong-Yuan Chang, Jyun-Hao Chang, Po-Hsiang Huang, Lipen Yuan | 2019-04-16 |
| 10192019 | Separation and minimum wire length constrained maze routing method and system | Fong-Yuan Chang, Ren-Song Tsay, Wai-Kei Mak | 2019-01-29 |