SP

Seyednaser Pourmousavian

TSMC: 3 patents #707 of 3,065Top 25%
Overall (2019): #69,646 of 560,194Top 15%
3
Patents 2019

Issued Patents 2019

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
10326454 All-digital phase locked loop using switched capacitor voltage doubler Feng-Wei Kuo, Chewn-Pu Jou, Huan-Neng Chen, Lan-Chou Cho, Robert Bogdan Staszewski 2019-06-18
10277117 Device with a voltage multiplier Yu-Tso Lin, Chih-Hsien Chang, Min-Shueh Yuan, Robert Bogdan Staszewski 2019-04-30
10171089 PVT-free calibration function using a doubler circuit for TDC resolution in ADPLL applications Feng-Wei Kuo, Chewn-Pu Jou, Lan-Chou Cho, Huan-Neng Chen, Robert Bogdan Staszewski 2019-01-01